The present application relates generally to the manufacture of semiconductor devices, and more specifically to the inhibition or prevention of defect-related failures in such devices.
The presence of defects in crystalline materials used in semiconductor devices is understood to be a cause of device underperformance or failure. Specifically, two-dimensional crystalline defects (i.e., dislocations and stacking faults) are formed in semiconductor materials, inter alia, from process-induced mechanisms such as ion implantation and crystal re-growth, which are used to form the source, drain, well and contact regions in complementary metal-oxide-semiconductor (CMOS) devices.
The formation and propagation of dislocations within a device architecture can adversely affect the electrical characteristics of the device. For example, dislocations can change the concentration of point defects adjacent to the dislocation loop. In n-type materials, dislocations behave as acceptors, while in p-type material dislocations behave as donors. Such behavior leads to formation of a leakage path that follows the propagation of the defect. If a dislocation propagates into the p-n junction of a device, it can increase the leakage current when it spans the device junction or even cause total failure of the device.
In view of the foregoing, it would be advantageous to provide a processing method for minimizing or preventing dislocation related failures.